1. Field of Invention
The present invention relates to the etching of an integrated circuit structure. More particularly, the present invention describes etching an integrated circuit having a metal hard mask layer.
2. Description of Related Art
Metals such as Tantalum (Ta) and Titanium (Ti) and metallic compounds such as Tantalum Nitride (TaN) and Titanium Nitride (TiN) have been widely used in integrated circuit fabrication. More particularly, these metals and metallic compounds have been used as antireflective coatings or barrier layers.
As IC manufacturing technology enters into 0.10 μm and beyond technology nodes, metals and metallic compounds are being investigated as a hard mask layer for a dielectric layer such as porous organo-silica-glass (pOSG).
There are many well-known approaches to etching a metal hard mask. One well known method uses a high-density plasma reactor in conjunction with a chlorine-containing plasma. This method requires using two reactors for an IC structure having a metal hard mask layer and dielectric layer. For the metal hard mask layer a high-density plasma reactor is used and for the dielectric a medium-density plasma reactor is used.
It would therefore be beneficial to perform the metal hard mask etching in the same chamber that is used to etch the dielectric layer of the IC structure.
An additional benefit associated with performing the metal hard mask etching and dielectric etching in the same reactor chamber is that the throughput is improved due to process simplification.
However, the chlorine-containing plasma that is typically used to etch the metal hard mask layer cannot be used in a medium-density tool used to etch the dielectric layer.
Therefore, it would be beneficial to provide a gas mixture that can perform metal hard mask etching in medium-density tool.
Additionally it would be beneficial to provide a method to overcome the difficulty associated with removing the photoresist after metal hard mask etching.